Link Chang, Rick HC Wang, Andy Chang, Simon T. C. Wang, Yu Pang Chang, C. G. Song
{"title":"The Solutions of Bit Line Failure Analysis: Low kV E-Beam, EBAC and LVI","authors":"Link Chang, Rick HC Wang, Andy Chang, Simon T. C. Wang, Yu Pang Chang, C. G. Song","doi":"10.1109/IPFA47161.2019.8984867","DOIUrl":null,"url":null,"abstract":"As the analysis of SRAM Memory Built In Self Test (MBIST), some failure modes such as single bit (SB) or dual bit (DB) failure can be localized accurately. The inspection area of SRAM SB/DB is around 1~2um2. Traditionally, we can use the Focus Ion Beam (FIB) for cross section (X-S) checking as a much quicker inspection. However, X-S FIB inspection is not suitable to analyze some other failure modes such as bit line (BL) failure, which has a larger inspection area, around 200um2. We usually use the Scanning Electron Microscope (SEM) and I-Beam Voltage Contrast (VC) methods to have a plane-view check along the failed BL to find any abnormality. Sometimes a tiny defect is not easy to observe by plane-view checking. In this paper, three alternative methods, Low kV Electron Beam (E-Beam), Electron Beam Absorbed Current (EBAC) and Laser Voltage Image (LVI) are used in three real cases, and achieve a goal of higher hit rate and shorter cycle time.","PeriodicalId":169775,"journal":{"name":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"27 11","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA47161.2019.8984867","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
As the analysis of SRAM Memory Built In Self Test (MBIST), some failure modes such as single bit (SB) or dual bit (DB) failure can be localized accurately. The inspection area of SRAM SB/DB is around 1~2um2. Traditionally, we can use the Focus Ion Beam (FIB) for cross section (X-S) checking as a much quicker inspection. However, X-S FIB inspection is not suitable to analyze some other failure modes such as bit line (BL) failure, which has a larger inspection area, around 200um2. We usually use the Scanning Electron Microscope (SEM) and I-Beam Voltage Contrast (VC) methods to have a plane-view check along the failed BL to find any abnormality. Sometimes a tiny defect is not easy to observe by plane-view checking. In this paper, three alternative methods, Low kV Electron Beam (E-Beam), Electron Beam Absorbed Current (EBAC) and Laser Voltage Image (LVI) are used in three real cases, and achieve a goal of higher hit rate and shorter cycle time.