Gate-Oxide Trapping Enabled Synaptic Logic Transistor

X. Ju, D. Ang
{"title":"Gate-Oxide Trapping Enabled Synaptic Logic Transistor","authors":"X. Ju, D. Ang","doi":"10.1109/IRPS45951.2020.9129338","DOIUrl":null,"url":null,"abstract":"Brain-inspired neuromorphic systems have attracted much attention as a new computing paradigm for energy-efficient computation by enabling massive parallelism in artificial neural networks. The successful realization of a large-scale manufacturable artificial synapse holds the key to a full-fledged neuromorphic hardware application. This work reveals basic synaptic-like responses in the output characteristics of a normal logic CMOS transistor (with EOT < 2 nm), enabled by charge trapping dynamics at oxide defects. In addition, metaplasticity, a higher order synaptic response, is also observed by encoding relative timing. Given the mature transistor technology, a synaptic logic transistor may potentially offer a quicker pathway towards commercial neuromorphic systems.","PeriodicalId":116002,"journal":{"name":"2020 IEEE International Reliability Physics Symposium (IRPS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Reliability Physics Symposium (IRPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS45951.2020.9129338","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

Brain-inspired neuromorphic systems have attracted much attention as a new computing paradigm for energy-efficient computation by enabling massive parallelism in artificial neural networks. The successful realization of a large-scale manufacturable artificial synapse holds the key to a full-fledged neuromorphic hardware application. This work reveals basic synaptic-like responses in the output characteristics of a normal logic CMOS transistor (with EOT < 2 nm), enabled by charge trapping dynamics at oxide defects. In addition, metaplasticity, a higher order synaptic response, is also observed by encoding relative timing. Given the mature transistor technology, a synaptic logic transistor may potentially offer a quicker pathway towards commercial neuromorphic systems.
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栅极氧化物捕获使能突触逻辑晶体管
以脑为灵感的神经形态系统作为一种新的计算范式,通过在人工神经网络中实现大规模并行计算而引起了人们的广泛关注。大规模可制造的人工突触的成功实现是成熟的神经形态硬件应用的关键。这项工作揭示了普通逻辑CMOS晶体管(EOT < 2 nm)的输出特性中的基本突触样响应,这是由氧化物缺陷处的电荷捕获动力学实现的。此外,元可塑性,一种更高阶的突触反应,也可以通过编码相对时间观察到。鉴于成熟的晶体管技术,突触逻辑晶体管可能为商业化的神经形态系统提供更快的途径。
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