Study of low resistance TSV using electroless plated copper and tungsten-alloy barrier

F. Inoue, T. Yokoyama, S. Tanaka, K. Yamamoto, M. Koyanagi, T. Fukushima, Z. Wang, S. Shingubara
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引用次数: 3

Abstract

We studied a low temperature deposition of tungsten-alloy barrier and copper layers only by electroless plating, with an aim of realizing low resistance TSV with a high aspect ratio. We succeeded in successive deposition of W-Ni-P barrier layer and Cu on SiO2. Furthermore, we found that the addition of Cl ions to SPS- and PEG- plating bath significantly improved the conformal deposition property even for a few μm in diameter TSVs with the aspect ratio higher than 10.
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化学镀铜钨合金阻挡层低电阻TSV的研究
为了实现高纵横比的低电阻TSV,我们研究了化学镀钨合金阻挡层和铜层的低温沉积。我们成功地在SiO2上连续沉积了W-Ni-P势垒层和Cu。此外,我们还发现,在SPS-和PEG-镀液中加入Cl离子,即使在长径比大于10、直径为几μm的tsv中,也能显著改善其保形沉积性能。
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Development of porous silica ultra low-k films for 32 nm-node interconnects and beyond New multi-step UV curing process for porogen-based porous SiOC Thin low-k SiOC(N) dielectric / ruthenium stacked barrier technology Study of low resistance TSV using electroless plated copper and tungsten-alloy barrier Co-design of reliable signal and power interconnects in 3D stacked ICs
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