Warpage and Simulation Analysis of Panel Level FO-WLCSP Using Equivalent CTE

Shih-Wei Liu, Chia-Han Tsai, K. Chiang
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引用次数: 3

Abstract

In an electronic packaging process, an improper molding process or design will result in excessive warpage of the package structure. When the warpage is too large, the subsequent process will be difficult to perform. The finite element method (FEM) is a common method for evaluating warpage during the molding process. However, in order to fully simulate the behavior of the epoxy resin during the molding process, a large number of experiments and simulations are required to obtain material parameters. Therefore, this study uses the equivalent thermal expansion coefficient method to simplify the simulation process and estimate the actual experimental warpage. And the method is used to build a panel-level package finite element model to estimate the amount of warpage.
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面板级FO-WLCSP翘曲及等效CTE仿真分析
在电子封装过程中,不适当的成型工艺或设计将导致封装结构过度翘曲。当翘曲过大时,后续工序将难以执行。有限元法(FEM)是评估成型过程翘曲的常用方法。然而,为了充分模拟环氧树脂在成型过程中的行为,需要进行大量的实验和模拟来获得材料参数。因此,本研究采用等效热膨胀系数法简化模拟过程,估算实际实验翘曲。并利用该方法建立了面板级封装有限元模型,以估计翘曲量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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