Minimizing ohmic loss in future processor IR events

Abstract

IR events are periods in time when processors draw a high level of steady state operating current. During IR events, ohmic losses occur in the power delivery path. To minimize these ohmic losses, conventional systems use parallelism to reduce the resistance of the power delivery path. As operating currents continue to increase, however, additional remedies may be required to maintain acceptable ohmic losses. We show how a processor with integrated step down converters can be used to reduce the ohmic loss in its power delivery path. In a 130nm technology node, our integrated solution can reduce the delivery path ohmic loss by 32.8%