Low cost test of MCMs using testable die carriers

Abstract

This paper addresses the issue of low cost testing of Multi Chip Modules (MCMs). The test cost of MCMs can be as much as 40 percent of the total cost of MCMs. Towards reducing the related assembly and test costs, we propose to use Testable Die Carriers (TDCs) to provide a unique solution for adding testability features to MCMs. Each TDC is a silicon logic device, containing embedded circuitry, which supports a single bare die. This eliminates the need for building expensive MCM testers as well as allows the use of a structured test methodology. The carrier contains Built In Self Test (BIST) and Boundary Scan (BS) architectures to test the die. Test algorithms are incorporated in the die carrier for enabling efficient interconnect and functional test of the die and the MCM.