High speed I/O buffer design for MCM

Proceedings 1997 IEEE Multi-Chip Module Conference Pub Date : 1997-02-04 DOI:10.1109/MCMC.1997.569345

S.J. Yang, T. Chang, Ruey-Wen Chien, E. Wang, T. Gabara, K. Tai, R. Frye

引用次数: 5

Abstract

It is well known that a bare die packaged in a MCM module will be exposed to a better electrical environment. Besides speed improvement, due to the lighter loading effects, chip power consumption can be reduced if conventional CMOS I/O buffers are replaced by some smaller and fancier ones, in which ESD protection mechanisms are removed. In this approach, chip designer must be involved in the task for devising those target chips to be packed into a MCM. In this paper, three types of differential CMOS I/O buffers especially for MCM will be discussed and their performances compared. In addition to the differential types, a new sets of I/O buffers, switchable MCM CMOS I/Os, meeting both MCM and PWB requirements, will also be investigated. And finally, the simulation and experiment results will follow.

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MCM高速I/O缓冲器设计

众所周知，封装在MCM模块中的裸晶片将暴露在更好的电气环境中。除了速度的提高，由于更轻的负载效应，如果将传统的CMOS I/O缓冲器替换为一些更小、更漂亮的缓冲器，去掉ESD保护机制，芯片功耗可以降低。在这种方法中，芯片设计者必须参与设计这些目标芯片以装入MCM的任务。本文讨论了三种专用于MCM的差分CMOS I/O缓冲器，并比较了它们的性能。除了不同类型之外，还将研究一套新的I/O缓冲器，可切换的MCM CMOS I/O，满足MCM和PWB的要求。最后给出了仿真和实验结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings 1997 IEEE Multi-Chip Module Conference

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