A 0.602 /spl mu/m/sup 2/ nestled 'Chain' cell structure formed by one mask etching process for 64 Mbit FeRAM

H. Kanaya, K. Tomioka, T. Matsushita, M. Omura, T. Ozaki, Y. Kumura, Y. Shimojo, T. Morimoto, O. Hidaka, S. Shuto, H. Koyama, Y. Yamada, K. Osari, N. Tokoh, F. Fujisaki, N. Iwabuchi, N. Yamaguchi, T. Watanabe, M. Yabuki, H. Shinomiya, N. Watanabe, E. Itoh, T. Tsuchiya, K. Yamakawa, K. Natori, S. Yamazaki, K. Nakazawa, D. Takashima, S. Shiratake, S. Ohtsuki, Y. Oowaki, I. Kunishima, A. Nitayama
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引用次数: 11

Abstract

We have successfully developed a 0.602 /spl mu/m/sup 2/ nestled 'Chain' FeRAM cell technology for 64Mbit FeRAM. In the 'Chain' FeRAM a pair of capacitors on a same node can be nestled close to each other A combination of a one mask etching process of ferro-electric capacitors and the nestled structure drastically scaled down the cell size to 0.602 /spl mu/m/sup 2/. The cell size was reduced to 32% of previous work. Signal window of 600 mV was obtained by the nestled 'Chain' FeRAM structure after full integration of three-metal CMOS technology.
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通过一次掩模蚀刻工艺形成的0.602 /spl mu/m/sup / 2/的“链状”单元结构
我们已经成功开发了用于64Mbit FeRAM的0.602 /spl mu/m/sup / 2/ s 'Chain' FeRAM单元技术。在“链式”FeRAM中,同一节点上的一对电容器可以彼此依偎在一起,铁电电容器的一次掩模蚀刻工艺和依偎结构的结合大大缩小了电池尺寸至0.602 /spl mu/m/sup 2/。细胞大小减少到以前工作的32%。在充分集成三金属CMOS技术后,采用“链式”FeRAM结构获得了600 mV的信号窗。
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