A 0.5GHz–1.5GHz order scalable harmonic rejection mixer

Teng Yang, Karthik Tripurari, H. Krishnaswamy, P. Kinget
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引用次数: 12

Abstract

In this paper, a harmonic rejection mixer architecture capable of operating for a wide range of LO frequencies is demonstrated. The mixer can be configured to suppress any particular harmonic of the LO or multiple harmonics simultaneously. The level of suppression of each harmonic is controlled by a set of independent gain and phase tuning parameters. Feasibility of extension of this concept to higher order harmonics is also demonstrated. A proof-of-principle prototype has been designed and fabricated in a 45nm SOI technology. Experimental results demonstrate an operation range of 0.5GHz to 1.5GHz for the LO frequency while offering harmonic rejection better than 55dB for the 3rd harmonic and 58dB for the 5th harmonic across LO frequencies. The mixer consumes 17mW of power from a 1V power supply while occupying an area of 0.352mm2.
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0.5GHz-1.5GHz阶可伸缩谐波抑制混频器
在本文中,一个谐波抑制混频器架构能够工作在宽范围的本振频率。混频器可以配置为同时抑制本LO的任何特定谐波或多个谐波。每个谐波的抑制水平由一组独立的增益和相位调谐参数控制。并证明了将此概念推广到高次谐波的可行性。采用45纳米SOI技术设计和制造了一个原理验证原型。实验结果表明,本端频率的工作范围为0.5GHz至1.5GHz,同时本端频率的三次谐波抑制优于55dB,五次谐波抑制优于58dB。混频器在占用0.352mm2的面积时,从1V电源消耗17mW的功率。
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