{"title":"Reliability evaluation of FUSS and other reconfiguration schemes","authors":"N. Lopez-Benitez, M. Chean","doi":"10.1109/DFTVS.1991.199956","DOIUrl":null,"url":null,"abstract":"One objective in the design of VLSI/WSI fault-tolerant processor arrays (FTPA), is to increase the probability of successful reconfiguration in the presence of one or more faults given that a fault has occurred (survivability). This paper reports a comparison of FUSS (Full-Use-of-Suitable-Spares), a recently proposed reconfiguration scheme, with other two well reconfiguration schemes. The results reported were obtained using MGRE (Model Generator and Reliability Evaluator). The models generated, already take into account the survivability rate of each reconfiguration scheme. This factor is obtained via simulation or whenever possible analytical expressions are derived.<<ETX>>","PeriodicalId":440536,"journal":{"name":"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1991.199956","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
One objective in the design of VLSI/WSI fault-tolerant processor arrays (FTPA), is to increase the probability of successful reconfiguration in the presence of one or more faults given that a fault has occurred (survivability). This paper reports a comparison of FUSS (Full-Use-of-Suitable-Spares), a recently proposed reconfiguration scheme, with other two well reconfiguration schemes. The results reported were obtained using MGRE (Model Generator and Reliability Evaluator). The models generated, already take into account the survivability rate of each reconfiguration scheme. This factor is obtained via simulation or whenever possible analytical expressions are derived.<>
VLSI/WSI容错处理器阵列(FTPA)设计的一个目标是，在存在一个或多个故障的情况下，增加成功重新配置的概率(生存性)。本文报道了最近提出的一种重新配置方案FUSS (full use -of- suitesares)与其他两种井重新配置方案的比较。报告的结果是通过MGRE(模型生成器和可靠性评估器)获得的。生成的模型已经考虑了每种重构方案的存活率。这个因子是通过模拟得到的，或者在可能的情况下推导出解析表达式。
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