Front-plane and Back-plane Bias Temperature Instability of 22 nm Gate-last FDSOI MOSFETs

Yang Wang, Chen Wang, Tao Chen, Hao Liu, Chinte Kuo, Ke Zhou, Bin. F. Yin, Lin Chen, Qingqing Sun
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Abstract

In this work, we investigated Bias Temperature Instability under front-plane and back-plane stress based on 22 nm gate-last FDSOI MOSFETs. The front-plane stress, which was twice the operation voltage, was applied to gate under 25 oC and 125 oC, while the back-plane stress, which was under similar electric field of front-plane stress, was applied to back-gate. The DC I-V measurement was carried out after the removal of the stress. For both nMOSFETs and pMOSFETs, the degradation of Id,lin and Id,sat, and the Vth shift were calculated to measure the deterioration of the devices. The results demonstrated that under similar electric field, the degradation caused by back-plane stress was more severe than that of front-plane stress.
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22nm栅末FDSOI mosfet的前、后平面偏置温度不稳定性
在这项工作中,我们研究了基于22纳米栅极FDSOI mosfet的前平面和后平面应力下的偏置温度不稳定性。在25℃和125℃条件下,对栅极施加2倍于工作电压的前平面应力,对栅极施加与前平面应力相似电场条件下的后平面应力。在去除应力后进行直流I-V测量。对于nmosfet和pmosfet,计算了Id、lin和Id、sat的退化和Vth移位来测量器件的退化。结果表明,在相似电场条件下,后平面应力的退化程度大于前平面应力的退化程度。
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