Hybrid Polymorphic Logic Gate with 5-Terminal Magnetic Domain Wall Motion Device

Farhana Parveen, Zhezhi He, Shaahin Angizi, Deliang Fan
{"title":"Hybrid Polymorphic Logic Gate with 5-Terminal Magnetic Domain Wall Motion Device","authors":"Farhana Parveen, Zhezhi He, Shaahin Angizi, Deliang Fan","doi":"10.1109/ISVLSI.2017.35","DOIUrl":null,"url":null,"abstract":"In this paper, a key-controlled hybrid spin-CMOS polymorphic logic gate using a novel 5 terminal magnetic domain wall motion device is proposed. The proposed hybrid polymorphic gate is able to perform a full set of 2-input Boolean logic functions (i.e. AND/NAND, OR/NOR, NOT, XOR/XNOR) by configuring the applied keys. The SPICE device-circuit co-simulation indicates that a full adder design using our proposed polymorphic logic gate shows 74.23% power reduction and 7.14% transistor count reduction compared with traditional CMOS full adder design. Our proposed polymorphic gate could be a promising hardware security primitive to address IC counterfeiting or reverse engineering by logic locking and polymorphic transformation. To summarize, by providing zero leakage power, low dynamic power consumption, compactness and polymorphism to logic circuits, our proposed design can thrive a new paradigm for future power efficient and secured computing platform.","PeriodicalId":187936,"journal":{"name":"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2017.35","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 25

Abstract

In this paper, a key-controlled hybrid spin-CMOS polymorphic logic gate using a novel 5 terminal magnetic domain wall motion device is proposed. The proposed hybrid polymorphic gate is able to perform a full set of 2-input Boolean logic functions (i.e. AND/NAND, OR/NOR, NOT, XOR/XNOR) by configuring the applied keys. The SPICE device-circuit co-simulation indicates that a full adder design using our proposed polymorphic logic gate shows 74.23% power reduction and 7.14% transistor count reduction compared with traditional CMOS full adder design. Our proposed polymorphic gate could be a promising hardware security primitive to address IC counterfeiting or reverse engineering by logic locking and polymorphic transformation. To summarize, by providing zero leakage power, low dynamic power consumption, compactness and polymorphism to logic circuits, our proposed design can thrive a new paradigm for future power efficient and secured computing platform.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
具有五端磁畴壁运动装置的混合多晶逻辑门
本文提出了一种基于五端磁畴壁运动器件的键控混合自旋cmos多晶逻辑门。所提出的混合多态门能够通过配置应用键来执行一整套2输入布尔逻辑功能(即AND/NAND, OR/NOR, NOT, XOR/XNOR)。SPICE器件电路联合仿真表明,与传统CMOS全加法器设计相比,采用本文提出的多晶型逻辑门设计的全加法器功耗降低74.23%,晶体管数量减少7.14%。我们提出的多态门可能是一个有前途的硬件安全原语,通过逻辑锁定和多态转换来解决IC伪造或逆向工程。总之,通过提供零泄漏功率、低动态功耗、紧凑和多态的逻辑电路,我们提出的设计可以为未来节能和安全的计算平台提供新的范例。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Power Delivery Network and Cell Placement Aware IR-Drop Mitigation Technique: Harvesting Unused Timing Slacks to Schedule Useful Skews On Tolerating Faults of TSV/Microbumps for Power Delivery Networks in 3D IC Assessing Self-Repair on FPGAs with Biologically Realistic Astrocyte-Neuron Networks AEGLE's Cloud Infrastructure for Resource Monitoring and Containerized Accelerated Analytics Voltage Noise Analysis with Ring Oscillator Clocks
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1