P. W. Liu, T. Kuo, C. I. Li, Y. R. Wang, R. Huang, C. Tsai, C. T. Tsai, G. H. Ma
{"title":"Dopant and thermal interaction on SPE formed SiC for NMOS performance enhancement","authors":"P. W. Liu, T. Kuo, C. I. Li, Y. R. Wang, R. Huang, C. Tsai, C. T. Tsai, G. H. Ma","doi":"10.1109/VTSA.2009.5159275","DOIUrl":null,"url":null,"abstract":"The dopant and thermal interaction on solid phase epitaxy (SPE) formed SiC has been investigated. We have studied the impact on substitutional carbon concentration ([C]sub) from various thermal steps including low temperature anneal, SiGe epitaxy thermal budget, RTP, and laser anneal (LSA). Regarding the integration scheme for implementing embedded SiC (eSiC) S/D on NMOS performance enhancement, both post-LDD and post-S/D schemes were studied. The higher [C]sub in post-LDD scheme was observed and the S/D dopants were found to enhance the carbon precipitation into interstitial with conventional RTP/LSA activation thermal processes. The phosphorous implant is also found to degrade [C]sub in comparison to As implant. The higher [C]sub and proximity to channel of formed eSiC in post-LDD scheme are beneficial to device performance. The fabricated eSiC S/D NMOS shows 31% mobility improvement and 7% current enhancement.","PeriodicalId":309622,"journal":{"name":"2009 International Symposium on VLSI Technology, Systems, and Applications","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Technology, Systems, and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTSA.2009.5159275","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The dopant and thermal interaction on solid phase epitaxy (SPE) formed SiC has been investigated. We have studied the impact on substitutional carbon concentration ([C]sub) from various thermal steps including low temperature anneal, SiGe epitaxy thermal budget, RTP, and laser anneal (LSA). Regarding the integration scheme for implementing embedded SiC (eSiC) S/D on NMOS performance enhancement, both post-LDD and post-S/D schemes were studied. The higher [C]sub in post-LDD scheme was observed and the S/D dopants were found to enhance the carbon precipitation into interstitial with conventional RTP/LSA activation thermal processes. The phosphorous implant is also found to degrade [C]sub in comparison to As implant. The higher [C]sub and proximity to channel of formed eSiC in post-LDD scheme are beneficial to device performance. The fabricated eSiC S/D NMOS shows 31% mobility improvement and 7% current enhancement.