{"title":"A new method for performance control of a differential active inductor for low power 2.4GHz applications","authors":"François Belmas, F. Hameau, J. Fournier","doi":"10.1109/ICICDT.2010.5510245","DOIUrl":null,"url":null,"abstract":"In this paper we present a new method for controlling the performance of a Differential Active Inductor (DAI) used as resonating output load of an RF amplifier and working at Ultra Low Power (ULP) consumption. A new solution is proposed for linearity improvement without extra power consumption and without SNR degradation. For a given impedance value at the resonance frequency of the DAI (corresponding to a given amplifier gain), tradeoff between quality factor Q and IIP3 is highlighted. Then, an optimization method is proposed which takes into account the power consumption. A simulated DAI presents -2.7 dBm IIP3, 40nV/Hz noise voltage density and almost 3.0kΩ load at the resonance frequency of 2.45GHz. The total power consumption is 0.8 mW under 1V power supply of a 65nm CMOS technology, and the circuit occupies 0.0012 mm² of silicon area.","PeriodicalId":187361,"journal":{"name":"2010 IEEE International Conference on Integrated Circuit Design and Technology","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Conference on Integrated Circuit Design and Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2010.5510245","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper we present a new method for controlling the performance of a Differential Active Inductor (DAI) used as resonating output load of an RF amplifier and working at Ultra Low Power (ULP) consumption. A new solution is proposed for linearity improvement without extra power consumption and without SNR degradation. For a given impedance value at the resonance frequency of the DAI (corresponding to a given amplifier gain), tradeoff between quality factor Q and IIP3 is highlighted. Then, an optimization method is proposed which takes into account the power consumption. A simulated DAI presents -2.7 dBm IIP3, 40nV/Hz noise voltage density and almost 3.0kΩ load at the resonance frequency of 2.45GHz. The total power consumption is 0.8 mW under 1V power supply of a 65nm CMOS technology, and the circuit occupies 0.0012 mm² of silicon area.
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