ON THE INTEGRATION OF DESIGN AND MANUFACTURING FOR IMPROVED TESTABILITY

Abstract

We present a new Manufacturing-For-Test technology based on new physical methods of testing digital VLSIIULSI circuits for faults, which has the potential for much greater testing efjciency than possible by conventional electrical addressing through external pins alone. The method uses variants of the pulsed laser probing of microelectronic devices, and various holographic techniques of formation of virtual (transient) interconnects, together with electrical pulse testing, to greatly increase test coverage. Combined with a Design-for-Test scheme, the new technology can significantly improve fault coverage by allowing direct access to internal nodes. The new Manufacturing-For-Test method utilizes standard fabrication technologies and introduces only a small area overhead, and circuit loading; it has the promise of low cost in manufacture and test, and requires no significant increase in the number of physical chip connections.