Y. Wang, Guangyi Lu, Lizhong Zhang, Jian Cao, S. Jia, Xing Zhang
{"title":"Comprehensive study and corresponding improvements on the ESD robustness of different nLDMOS devices","authors":"Y. Wang, Guangyi Lu, Lizhong Zhang, Jian Cao, S. Jia, Xing Zhang","doi":"10.1109/IPFA.2014.6898177","DOIUrl":null,"url":null,"abstract":"Four-terminal and three-terminal asymmetrical n-type LDMOS (asym-nLDMOS) devices are investigated in 0.18μm 40V SOI BCD technology. To improve normal asym-nLDMOS devices ESD robustness, an additional p-sink implant is added beneath their source/drain diffusion regions. Transmission line pulse measured results show that the novel asym-nLDMOS devices have a suitable triggering voltage and 30-48% improvement of second breakdown current.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2014.6898177","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
Four-terminal and three-terminal asymmetrical n-type LDMOS (asym-nLDMOS) devices are investigated in 0.18μm 40V SOI BCD technology. To improve normal asym-nLDMOS devices ESD robustness, an additional p-sink implant is added beneath their source/drain diffusion regions. Transmission line pulse measured results show that the novel asym-nLDMOS devices have a suitable triggering voltage and 30-48% improvement of second breakdown current.
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