A new technique to extract the gate bias dependent s/d series resistance of sub-100nm MOSFETs

Abstract

In this study, a new technique to extract the S/D series resistance (Rsd) from the total resistance versus transconductance gain plot Rtot(1/β) is proposed. The technique only requires the measurement of Id(Vgs)|Vgt and β, allowing fast and statistical analysis in an industrial context. Unlike the usual Rtot(L)-based techniques, it has the advantage of being insensitive to the channel length and mobility variations and finally enables to extract very accurate values for Rsd(Vgs) and the effective mobility reduction factor µeff(Vgt)/µeff(0).