A digital-intensive F/PLL-based two-point modulator with a constant-gain DCO for linear FMCW generation

Abstract

This paper describes a frequency and phase-locked loop (F/PLL) based two-point modulator architecture for FMCW generation. A semi-digital ΔΣ PLL without a linear TDC is designed to form a nested-loop DCO with a constant gain in the F/PLL. A frequency error caused by a time-varying phase offset in the analog control path with a long modulation period can be mitigated by the loop gain of the frequency-locked loop (FLL). A prototype two-point modulator implemented in 0.18μm CMOS achieves frequency accuracy of <;100kHzrms for >10ms modulation period, showing that the proposed F/PLL can be a useful module for accurate detection and high velocity resolution FMCW radar systems.