High Voltage MOS Transistor with a Folded n- Region for Flash Technology

Abstract

Floating gate devices like EEPROM and Flash memory require high voltages up to 20 V for programming and erase operations. This high voltage can only be handled with large MOS transistors. A common approach is to form a drift region which increases the on-resistance of the transistor. Here an extra voltage drop between the contact and the transistor channel is gernerated. In order to save chip area, a transistor is presented with the high resistive drift regions folded into the trenches on both sides of the gate.