George M. Belansek, P. Loomis, F. Towler, Charles Warner, D. Wheeler
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引用次数: 0
Abstract
A design is presented using a multilayered ceramic (MLC) substrate as the basis for the wafer-tester interface. A 27*27 matrix of pads on 225 mu m centers is contacted; this design replaces a hand-wire interface between the wafer probe and tester performance board. Significant reductions in signal crosstalk and power supply noise are realized.<>
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