{"title":"A tribute to graphics DRAMs","authors":"B. Prince","doi":"10.1109/MTDT.1999.782693","DOIUrl":null,"url":null,"abstract":"High speed graphics subsystems used some of the earliest application specific DRAMs. Knowledge gained from working with these specialized parts has provided a background for many of the innovations seen today in high speed DRAMs, fast core DRAMs, and high bandwidth embedded DRAMs. Years before synchronous DRAMs become common, clocked DRAM field memories for television frame buffers were in production. The later Video DRAMs were precursors for EDO page mode, dual bank architecture, synchronous operation, and high bandwidth through use of a wide internal bus. Implementations for graphics subsystems today continue to spearhead the emerging area of embedded DRAMs and parallel processing.","PeriodicalId":166999,"journal":{"name":"Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1999-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTDT.1999.782693","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
High speed graphics subsystems used some of the earliest application specific DRAMs. Knowledge gained from working with these specialized parts has provided a background for many of the innovations seen today in high speed DRAMs, fast core DRAMs, and high bandwidth embedded DRAMs. Years before synchronous DRAMs become common, clocked DRAM field memories for television frame buffers were in production. The later Video DRAMs were precursors for EDO page mode, dual bank architecture, synchronous operation, and high bandwidth through use of a wide internal bus. Implementations for graphics subsystems today continue to spearhead the emerging area of embedded DRAMs and parallel processing.