Interconnect diagnosis of bus-connected multi-RAM systems

Jun Zhao, F. Meyer, F. Lombardi
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引用次数: 1

Abstract

This paper presents a novel approach for detection and diagnosis (with no confounding or aliasing) of interconnect faults (short and stuck-at) in a system consisting of multiple RAM chips connected through busses. These systems (referred to as a bus-connected multi RAM systems, or BCMRS) are characterized by multiple types of lines (bus and driver lines), disjoint busses (address and data) as well as by the presence of memories (whose number is given by D). Different testing objectives (detection and maximal diagnosis) are considered. An extensive analysis of the faults is pursued to characterize their impact on the BCMRS as well as on the test operations (such as WRITE and READ).
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总线连接的多ram系统互连诊断
本文提出了一种在由多个RAM芯片通过总线连接的系统中检测和诊断互连故障(短故障和卡故障)的新方法(无混淆或混叠)。这些系统(称为总线连接的多RAM系统,或BCMRS)的特点是多种类型的线路(总线和驱动线路),不连接的总线(地址和数据)以及存储器的存在(其数量由D给出)。考虑了不同的测试目标(检测和最大诊断)。对故障进行广泛的分析,以描述它们对BCMRS以及测试操作(如WRITE和READ)的影响。
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