CAD tools for area-distributed I/O pad packaging

Abstract

The use of area interconnect packaging in high frequency microprocessors is motivated by its high-bandwidth and good power distribution capability. An MCM packaging scheme based on area-distributed I/O pads serves as the foundation of the PUMA project at the University of Michigan. Area interconnect facilitates high I/O counts, shorter interconnect routes, smaller power rails, and better thermal conductivity, all of which are important in high clock-rate digital systems. This paper introduces recently developed CAD tools that aid in the design of flip-chip area-interconnected integrated circuits. The tools permit the designer to place and route area bond pads as dictated by the layout of the microprocessor. System level issues, such as adequate power distribution and placement of area pad buffers, are addressed. The CAD system includes area pad power analysis, floorplanning, and routing tools.