J. Guthrie, D. Mensa, T. Mathew, Q. Lee, S. Krishnan, S. Jaganathan, S. Ceran, Y. Betser, M. Rodwell
{"title":"A 50 mm copper/polymer substrate HBT IC technology for >100 GHz MMICs","authors":"J. Guthrie, D. Mensa, T. Mathew, Q. Lee, S. Krishnan, S. Jaganathan, S. Ceran, Y. Betser, M. Rodwell","doi":"10.1109/ICIPRM.1999.773724","DOIUrl":null,"url":null,"abstract":"We report HBT integrated circuits fabricated by substrate transfer on 50 mm diameter copper/polymer substrates. Layout and packaging of complex /spl sim/100 GHz circuits is facilitated by the microstrip wiring environment and the low ground lead inductance it affords. For ICs operating above 100 GHz, the process allows radical scaling of the microstrip dielectric thickness without requiring handling of delicate thinned III-V wafers. The process can provide greatly improved heatsinking. Furthermore, full 50 mm wafers can be processed incorporating transferred substrate HBTs, devices which have obtained >500 GHz f/sub max/.","PeriodicalId":213868,"journal":{"name":"Conference Proceedings. Eleventh International Conference on Indium Phosphide and Related Materials (IPRM'99) (Cat. No.99CH36362)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Proceedings. Eleventh International Conference on Indium Phosphide and Related Materials (IPRM'99) (Cat. No.99CH36362)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIPRM.1999.773724","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We report HBT integrated circuits fabricated by substrate transfer on 50 mm diameter copper/polymer substrates. Layout and packaging of complex /spl sim/100 GHz circuits is facilitated by the microstrip wiring environment and the low ground lead inductance it affords. For ICs operating above 100 GHz, the process allows radical scaling of the microstrip dielectric thickness without requiring handling of delicate thinned III-V wafers. The process can provide greatly improved heatsinking. Furthermore, full 50 mm wafers can be processed incorporating transferred substrate HBTs, devices which have obtained >500 GHz f/sub max/.