Guangxiang Li, Jianping Guo, Yanqi Zheng, Mo Huang, Dihu Chen
{"title":"Cascoded flipped voltage follower based output-capacitorless low-dropout regulator for SoCs","authors":"Guangxiang Li, Jianping Guo, Yanqi Zheng, Mo Huang, Dihu Chen","doi":"10.1109/SOCC.2015.7406985","DOIUrl":null,"url":null,"abstract":"A novel cascoded flipped voltage follower (CAFVF) based output-capacitorless low-dropout (LDO) regulator is proposed and implemented in 0.18-μm CMOS technology. With a cascode current source (CCS) embedded into the CAFVF structure, the proposed LDO regulator achieves 58.6-dB DC gain in heavy loading condition (100 mA), which is 44-dB for the conventional CAFVF counterpart under identical conditions. The cascode compensation technique is introduced to widen the loop bandwidth and reduce the minimal loading requirement. With a 5-pF compensation capacitor, the minimum load current to keep the proposed LDO regulator stable is reduced to 50 μA. In addition, the unity-gain frequency (UGF) is extended from 1.51 MHz to 2.36 MHz in 100-mA loading condition. Moreover, an accurate stability analysis without ignoring any channel resistance has been presented in this work. Simulation results show that the LDO regulator consumes an ultra-low quiescent current (Iq) of 14 μA for input voltage ranging from 1.2 V to 1.8 V, with a dropout voltage (Vdrop) of 200 mV.","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"197 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406985","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A novel cascoded flipped voltage follower (CAFVF) based output-capacitorless low-dropout (LDO) regulator is proposed and implemented in 0.18-μm CMOS technology. With a cascode current source (CCS) embedded into the CAFVF structure, the proposed LDO regulator achieves 58.6-dB DC gain in heavy loading condition (100 mA), which is 44-dB for the conventional CAFVF counterpart under identical conditions. The cascode compensation technique is introduced to widen the loop bandwidth and reduce the minimal loading requirement. With a 5-pF compensation capacitor, the minimum load current to keep the proposed LDO regulator stable is reduced to 50 μA. In addition, the unity-gain frequency (UGF) is extended from 1.51 MHz to 2.36 MHz in 100-mA loading condition. Moreover, an accurate stability analysis without ignoring any channel resistance has been presented in this work. Simulation results show that the LDO regulator consumes an ultra-low quiescent current (Iq) of 14 μA for input voltage ranging from 1.2 V to 1.8 V, with a dropout voltage (Vdrop) of 200 mV.