{"title":"Submicron fully self-aligned AlInAs/GaInAs HBTs for low-power applications","authors":"M. Hafizi, W. Stanchina, H. Sun","doi":"10.1109/DRC.1995.496279","DOIUrl":null,"url":null,"abstract":"We have developed a new HBT process to fabricate submicron emitter geometries for applications requiring ultra-low-power consumption and very high-speed performance. We have made devices with an emitter area of approximately 0.3 /spl mu/m/sup 2/ which exhibit a maximum frequency of oscillation, f/sub max/ of 99 GHz. These transistors are more than an order of magnitude smaller than our current baseline transistors. We have developed a fully self-aligned process to minimize the lateral dimensions of the device associated with the base and collector contact regions. In this novel approach the emitter, base and collector ohmic metals are all self-aligned to the emitter mesa. Furthermore, the three ohmic contacts, i.e. emitter, base, and collector are defined and deposited in a single metallization step thereby simplifying the fabrication process. The simplified process and higher packing density (from scaled transistors and interconnects) should lead to better yield for low-power ICs.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 53rd Annual Device Research Conference Digest","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.1995.496279","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We have developed a new HBT process to fabricate submicron emitter geometries for applications requiring ultra-low-power consumption and very high-speed performance. We have made devices with an emitter area of approximately 0.3 /spl mu/m/sup 2/ which exhibit a maximum frequency of oscillation, f/sub max/ of 99 GHz. These transistors are more than an order of magnitude smaller than our current baseline transistors. We have developed a fully self-aligned process to minimize the lateral dimensions of the device associated with the base and collector contact regions. In this novel approach the emitter, base and collector ohmic metals are all self-aligned to the emitter mesa. Furthermore, the three ohmic contacts, i.e. emitter, base, and collector are defined and deposited in a single metallization step thereby simplifying the fabrication process. The simplified process and higher packing density (from scaled transistors and interconnects) should lead to better yield for low-power ICs.