Evaluation of a D-band divide-by-3 injection-locked frequency divider in 65 nm CMOS process

Abstract

In this paper, a D-band divider-by-3 injection-locked frequency divider is presented using 65 CMOS process. By using the technique of the second harmonic boosting, the input sensitivity and locking range can be enhanced in the millimeter-wave band without additional dc power consumption. As the input frequency is 134.6 GHz with a RF power of -8.5 dBm, the measured locking range is 0.4 GHz without varactor tuning, and the output power is high than -18 dBm. The core dc power consumption is 2.3 mW.