T. Georgantas, K. Vavelidis, N. Haralabidis, S. Bouras, I. Vassiliou, C. Kapnistis, Y. Kokolakis, H. Peyravi, G. Theodoratos, K. Vryssas, N. Kanakaris, Christos Kokozidis, Spyros Kavvadias, S. Plevridis, P. Mudge, I. Elgorriaga, A. Kyranas, Spyridon Liolis, Eleni-Sotiria Kytonaki, G. Konstantopoulos, P. Robogiannakis, K. Tsilipanos, Michael Margaras, P. Betzios, R. Magoon, Nias Bouras, M. Rofougaran, R. Rofougaran
{"title":"9.1 A 13mm2 40nm multiband GSM/EDGE/HSPA+/TDSCDMA/LTE transceiver","authors":"T. Georgantas, K. Vavelidis, N. Haralabidis, S. Bouras, I. Vassiliou, C. Kapnistis, Y. Kokolakis, H. Peyravi, G. Theodoratos, K. Vryssas, N. Kanakaris, Christos Kokozidis, Spyros Kavvadias, S. Plevridis, P. Mudge, I. Elgorriaga, A. Kyranas, Spyridon Liolis, Eleni-Sotiria Kytonaki, G. Konstantopoulos, P. Robogiannakis, K. Tsilipanos, Michael Margaras, P. Betzios, R. Magoon, Nias Bouras, M. Rofougaran, R. Rofougaran","doi":"10.1109/ISSCC.2015.7062975","DOIUrl":null,"url":null,"abstract":"To support increased device functionality and higher data-rates in LTE-enabled systems, while improving user experience and usage time, there is a need to reduce RFIC size and power consumption without degrading performance, while maintaining backward compatibility with legacy 2G/3G systems [1]. This paper introduces a 13mm2, 40nm CMOS 2G/HSPA+/TDSCDMA/UE cat. 4 transceiver that consumes 36/65mA battery-referenced current in 3G/LTE20 modes (B1, -50dBm TX, -60dBm RX). This is achieved in part by employing a multiport single-core LNA with a multitap inductor and a current-mode-driven single-core transmit mixer. Baseband-assisted calibration techniques help achieve <;1.2% RX EVM in LTE20 and >60dBm IIP2 in all bands. To save on platform area and cost, the RFIC supports single-ended LNAs, 32kHz clock generation, and free-running XTAL operation. TX SAW filters are not required.","PeriodicalId":188403,"journal":{"name":"2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2015.7062975","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
To support increased device functionality and higher data-rates in LTE-enabled systems, while improving user experience and usage time, there is a need to reduce RFIC size and power consumption without degrading performance, while maintaining backward compatibility with legacy 2G/3G systems [1]. This paper introduces a 13mm2, 40nm CMOS 2G/HSPA+/TDSCDMA/UE cat. 4 transceiver that consumes 36/65mA battery-referenced current in 3G/LTE20 modes (B1, -50dBm TX, -60dBm RX). This is achieved in part by employing a multiport single-core LNA with a multitap inductor and a current-mode-driven single-core transmit mixer. Baseband-assisted calibration techniques help achieve <;1.2% RX EVM in LTE20 and >60dBm IIP2 in all bands. To save on platform area and cost, the RFIC supports single-ended LNAs, 32kHz clock generation, and free-running XTAL operation. TX SAW filters are not required.