Siddharth Dhar, S. Monfray, F. Gianesello, F. Julien, Julien Dura, C. Legrand, J. Amouroux, B. Gros, L. Welter, C. Charbuillet, P. Cathelin, E. Canderle, N. Vulliet, E. Escolier, L. Antunes, E. Rouchouze, P. Fornara, C. Rivero, G. Bertrand, P. Chevalier, A. Régnier, D. Gloria, A. Fleury
{"title":"Performance Trade-Off of RFSOI Switches Under Scaled Bias Conditions","authors":"Siddharth Dhar, S. Monfray, F. Gianesello, F. Julien, Julien Dura, C. Legrand, J. Amouroux, B. Gros, L. Welter, C. Charbuillet, P. Cathelin, E. Canderle, N. Vulliet, E. Escolier, L. Antunes, E. Rouchouze, P. Fornara, C. Rivero, G. Bertrand, P. Chevalier, A. Régnier, D. Gloria, A. Fleury","doi":"10.1109/SiRF56960.2023.10046146","DOIUrl":null,"url":null,"abstract":"Over the years, RFSOI has emerged as dominant technology for building RF FEM modules with optimum cost and performance. RFSOI switches are typically designed using thick gate oxides with biasing up to 3. 3V to deliver minimum RON x COFF. With the strong push of operating digital devices at lower voltages, it would become necessary to evaluate the performance of the switch under such operating conditions. In this paper, we analyze the impact of RON x COFF of the switch in 200mm RFSOI technology, under scaled bias conditions and propose path for device optimization.","PeriodicalId":354948,"journal":{"name":"2023 IEEE 23rd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-01-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE 23rd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SiRF56960.2023.10046146","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Over the years, RFSOI has emerged as dominant technology for building RF FEM modules with optimum cost and performance. RFSOI switches are typically designed using thick gate oxides with biasing up to 3. 3V to deliver minimum RON x COFF. With the strong push of operating digital devices at lower voltages, it would become necessary to evaluate the performance of the switch under such operating conditions. In this paper, we analyze the impact of RON x COFF of the switch in 200mm RFSOI technology, under scaled bias conditions and propose path for device optimization.
多年来,RFSOI已成为构建具有最佳成本和性能的射频有限元模块的主导技术。RFSOI开关通常使用偏置高达3的厚栅极氧化物设计。3V提供最小的RON x COFF。随着数字器件在较低电压下工作的强烈推动,有必要在这种工作条件下评估开关的性能。在本文中,我们分析了200mm RFSOI技术中开关在比例偏置条件下的RON x COFF的影响,并提出了器件优化的途径。