B. Nguyen, A. Thean, T. White, A. Vandooren, M. Sadaka, L. Mathew, A. Barr, S. Thomas, M. Zalava, Da Zhang, D. Eades, Zhonghai Shi, J. Schaeffer, D. Triyoso, S. Samavedam, V. Vartanian, T. Stephen, B. Goolsby, S. Zollner, Ran Liu, R. Noble, T. Nguyen, V. Dhandapani, B. Xie, X. Wang, J. Jiang, R. Rai, M. Sadd, M. Ramón, S. Kalpat, L. Prabhu, V. Kaushik, Y. Du, T. Dao, M. Mendicino, Marius K. Orlowski, P. Tobin, J. Mogab, S. Venkatesan
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引用次数: 2
Abstract
In this paper, we will detail the issues with new materials being introduced into CMOS devices and present some potential solutions to enable high performance and low power CMOS for the 65nm node and beyond.
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