Critical area based yield modeling on an advanced microprocessor design

J. Segal, S. Parker, S. Bakarian, J. Pak
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引用次数: 4

Abstract

Critical area analysis was performed on a complex microprocessor design. (>1 Gbyte GDS file). The following applications of critical area analysis are demonstrated: yield partitioning by process layer, yield partitioning by layout block, and design for manufacturability. Advanced features such as netlist extraction, layer shift operation, and geometric expansion compared to Monte Carlo critical area extraction are discussed.
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基于关键区域的成品率建模的先进微处理器设计
对一个复杂的微处理器设计进行了临界区域分析。(> 1gb的GDS文件)。演示了关键区域分析的以下应用:按工艺层划分良率,按布局块划分良率,以及可制造性设计。讨论了网络列表提取、层移位操作和与蒙特卡罗关键区域提取相比的几何扩展等高级特性。
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