L. Yin, M. Fang, L. Zeng, Lilun Zhang, G. Du, Xiaoyan Liu
{"title":"Accelerated 3D full band self-consistent ensemble Monte Carlo device simulation utilizing intel MIC co-processors on tianhe II","authors":"L. Yin, M. Fang, L. Zeng, Lilun Zhang, G. Du, Xiaoyan Liu","doi":"10.1109/IWCE.2015.7301990","DOIUrl":null,"url":null,"abstract":"We use Intel Xeon Phi Many Integrated Core (MIC) to accelerate our 3D full band self-consistent ensemble Monte Carlo simulator. We put Quantum Correction part onto MIC and others are still processed on CPU. We compare results between this newly developed MIC+CPU mode and traditional all-on-CPU mode in three different situations. We find that MIC co-processors are suitable for 3D MC simulation with large grid number and large-number computing nodes.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"127 34-35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International Workshop on Computational Electronics (IWCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWCE.2015.7301990","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
We use Intel Xeon Phi Many Integrated Core (MIC) to accelerate our 3D full band self-consistent ensemble Monte Carlo simulator. We put Quantum Correction part onto MIC and others are still processed on CPU. We compare results between this newly developed MIC+CPU mode and traditional all-on-CPU mode in three different situations. We find that MIC co-processors are suitable for 3D MC simulation with large grid number and large-number computing nodes.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
