Parallel Simulation-Based Verification of RC Power Grids

Abstract

The power delivery network (PDN) must undergo a sequence of verification steps throughout the integrated circuit (IC) design flow. Typically, this is done by performing a transient simulation of the grid under certain input current traces, and checking that the resulting node voltages are within some user-specified thresholds. Existing tools require solving a large number of linear systems making them slow for modern power grids with billions of nodes. We propose a parallel simulation-based tool for RC grid verification that generates envelope waveforms on the true voltage drop waveforms. The resulting waveforms capture the peaks of the voltage drops quite accurately and require solving a much smaller number of linear systems than traditional tools.