Yield Improvement Methodology with addressing Design Systematics during Production Ramp-up

Jianhua Yin, Ian Chen, Rakesh Chokanathan, Suraj Gyawali, Yupei Du, Yuansong Wang, Xue Mei Liu, CT Lim, Wen Zhi Gao
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Abstract

Fast product yield learning rate is very critical to shorten the design to market cycle time, especially for mobile products with only 2~3-year product lifetime. Based on the typical yield learning curve as a function of a product’ life cycle, systematic defects resulting from the interaction between design and process may dominate product yield loss. Root cause identification and technical solutions of these systematics are very critical to achieve a significant improvement in the stage of production ramp-up stage. In this paper, a yield improvement methodology is presented to address design systematics and has been successfully deployed in multiple cases during volume ramp-up production in 14nm and beyond technology.
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在产量提升过程中解决设计系统问题的良率改进方法
快速的产品良率学习率对于缩短从设计到市场的周期至关重要,特别是对于产品寿命只有2~3年的移动产品。基于典型的良率学习曲线作为产品生命周期的函数,由于设计和工艺之间的相互作用而产生的系统性缺陷可能主导产品良率损失。这些系统的根本原因识别和技术解决方案对于实现增产阶段的显著改善至关重要。在本文中,提出了一种良率改进方法,以解决设计系统问题,并已成功应用于14nm及以上技术量产过程中的多个案例。
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