16.7 A 20V 8.4W 20MHz four-phase GaN DC-DC converter with fully on-chip dual-SR bootstrapped GaN FET driver achieving 4ns constant propagation delay and 1ns switching rise time

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引用次数: 55

Abstract

Recently, the demand for miniaturized and fast transient response power delivery systems has been growing in high-voltage industrial electronics applications. Gallium Nitride (GaN) FETs showing a superior figure of merit (Rds, ON X Qg) in comparison with silicon FETs [1] can enable both high-frequency and high-efficiency operation in these applications, thus making power converters smaller, faster and more efficient. However, the lack of GaN-compatible high-speed gate drivers is a major impediment to fully take advantage of GaN FET-based power converters. Conventional high-voltage gate drivers usually exhibit propagation delay, tdelay, of up to several 10s of ns in the level shifter (LS), which becomes a critical problem as the switching frequency, fsw, reaches the 10MHz regime. Moreover, the switching slew rate (SR) of driving GaN FETs needs particular care in order to maintain efficient and reliable operation. Driving power GaN FETs with a fast SR results in large switching voltage spikes, risking breakdown of low-Vgs GaN devices, while slow SR leads to long switching rise time, tR, which degrades efficiency and limits fsw. In [2], large tdelay and long tR in the GaN FET driver limit its fsw to 1MHz. A design reported in [3] improves tR to 1.2ns, thereby enabling fsw up to 10MHz. However, the unregulated switching dead time, tDT, then becomes a major limitation to further reduction of tde!ay. This results in limited fsw and narrower range of VIN-VO conversion ratio. Interleaved multiphase topologies can be the most effective way to increase system fsw. However, each extra phase requires a capacitor for bootstrapped (BST) gate driving which incurs additional cost and complexity of the PCB design. Moreover, the requirements of fsw synchronization and balanced current sharing for high fsw operation in multiphase implementation are challenging.
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16.7 20V 8.4W 20MHz四相GaN DC-DC变换器,采用全片上双sr自启动GaN FET驱动器,实现4ns恒定传播延迟和1ns开关上升时间
近年来,在高压工业电子应用中,对小型化和快速瞬态响应电力传输系统的需求不断增长。与硅fet相比,氮化镓(GaN) fet具有优越的性能(Rds, ON X Qg),可以在这些应用中实现高频和高效率的工作,从而使功率变换器更小,更快,更高效。然而,缺乏与氮化镓兼容的高速栅极驱动器是充分利用氮化镓场效应晶体管功率变换器的主要障碍。传统的高压栅极驱动器在电平移位器(LS)中通常表现出高达10s / ns的传播延迟,当开关频率达到10MHz时,这成为一个关键问题。此外,驱动GaN场效应管的开关压转率(SR)需要特别注意,以保持高效可靠的运行。具有快速SR的驱动功率GaN fet会导致大的开关电压尖峰,有可能导致低vgs GaN器件击穿,而缓慢SR会导致长开关上升时间tR,从而降低效率并限制fsw。在b[2]中,GaN FET驱动器的大延迟和长tR限制了其fsw为1MHz。b[3]中报道的一种设计将tR提高到1.2ns,从而使fsw达到10MHz。然而,无规开关死区时间(tDT)成为进一步降低tDT的主要限制因素。这导致有限的fsw和较窄的VIN-VO转换比的范围。交错多相拓扑结构是提高系统fsw的最有效方法。然而,每个额外的相位都需要一个用于自举(BST)栅极驱动的电容器,这会带来额外的成本和PCB设计的复杂性。此外,在多相实现中,对fsw同步和均衡电流分担的要求是具有挑战性的。
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