G. Koh, Y. Hwang, Sun-Ghil Lee, Suyoun Lee, K. Ryoo, Joon-Min Park, Yun-Heub Song, Soomin Ahn, Changwook Jeong, F. Yeung, Y. Kim, J.-B. Park, G. Jeong, H. Jeong, Keunnam Kim
{"title":"PRAM process technology","authors":"G. Koh, Y. Hwang, Sun-Ghil Lee, Suyoun Lee, K. Ryoo, Joon-Min Park, Yun-Heub Song, Soomin Ahn, Changwook Jeong, F. Yeung, Y. Kim, J.-B. Park, G. Jeong, H. Jeong, Keunnam Kim","doi":"10.1109/ICICDT.2004.1309906","DOIUrl":null,"url":null,"abstract":"PRAM(Phase-Change RAM) is a promising memory that can solve the problems of conventional memory and has the nearly ideal memory characteristics. We reviewed the issues for high density PRAM integration. Writing current reduction is the most urgent problem for high density PRAM realization. We presented process factors which affect the writing current and the result of improvement. Finally we demonstrated results of 64Mb PRAM integration based on 0.18/spl mu/m CMOS technology.","PeriodicalId":158994,"journal":{"name":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2004.1309906","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
PRAM(Phase-Change RAM) is a promising memory that can solve the problems of conventional memory and has the nearly ideal memory characteristics. We reviewed the issues for high density PRAM integration. Writing current reduction is the most urgent problem for high density PRAM realization. We presented process factors which affect the writing current and the result of improvement. Finally we demonstrated results of 64Mb PRAM integration based on 0.18/spl mu/m CMOS technology.
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