U. Spalthoff, J. Scherb, W. Korber, A. Ambrosy, J. Hehmann, D. Ferling, W. Rehm
{"title":"Flip-chip-mounted pin-photodiode array for 2.5 Gbit/s-per-channel parallel optical interconnections","authors":"U. Spalthoff, J. Scherb, W. Korber, A. Ambrosy, J. Hehmann, D. Ferling, W. Rehm","doi":"10.1109/ICIPRM.1996.492027","DOIUrl":null,"url":null,"abstract":"High speed InP-InGaAs-InP pin photodiode arrays on semi-insulating InP substrate have been realized. Essentially flat frequency response up to 4 GHz has been achieved due to low diode capacitance of 530 fF at -10 volts and low series resistance. After Au/Au thermocompression flip-chip bonding onto silicon motherboards with integrated V-grooves, interconnection lines and Au bumps they have been passively coupled to single mode fibre ribbons. The overall performance demonstrates that the array simultaneously meets advanced requirements for high sensitivity 2.5 Gbit/s receivers as well as for low-cost fibre coupling with passive alignment.","PeriodicalId":268278,"journal":{"name":"Proceedings of 8th International Conference on Indium Phosphide and Related Materials","volume":"92 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-04-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 8th International Conference on Indium Phosphide and Related Materials","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIPRM.1996.492027","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
High speed InP-InGaAs-InP pin photodiode arrays on semi-insulating InP substrate have been realized. Essentially flat frequency response up to 4 GHz has been achieved due to low diode capacitance of 530 fF at -10 volts and low series resistance. After Au/Au thermocompression flip-chip bonding onto silicon motherboards with integrated V-grooves, interconnection lines and Au bumps they have been passively coupled to single mode fibre ribbons. The overall performance demonstrates that the array simultaneously meets advanced requirements for high sensitivity 2.5 Gbit/s receivers as well as for low-cost fibre coupling with passive alignment.
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