Á. B. de Oliveira, F. Benevenuti, L. A. C. Benites, G. Rodrigues, F. Kastensmidt, N. Added, V. Aguiar, N. Medina, M. Silveira, Cédric Debarge
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引用次数: 0
Abstract
This work investigates the influence of using the built-in configuration memory scrubber and triple modular hardware redundancy in the cross section of a radiation-hardened SRAM-based FPGA from NanoXplore. Different designs versions are investigated under heavy ions for the occurrence of transient errors, failures, and timeouts. The calculated dynamic cross-sections are in agreement with the expected order of magnitude of radiation hardened SRAM-based FPGAs. Results show that the most reliable configuration is using DSPs for the operational logic and applying full design redundancy combined with scrubbing.