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2018 18th European Conference on Radiation and Its Effects on Components and Systems (RADECS)最新文献

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Progress of CNA to become the Spanish facility for combined irradiation testing in aerospace CNA成为西班牙航空航天联合辐照试验设施的进展
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328656
Y. Morilla, P. Martín-Holgado, A. Romero, J. Labrador, B. Fernández, J. Praena, A. Lindoso, M. García-Valderas, M. Peña-Fernandez, L. Entrena
The development of some Spanish national research projects has contributed to improve CNA capabilities to perform irradiation testing for aerospace applications. An overview on the Centre evolution during the last years will be presented. A particular study on current capability to perform fault injection campaigns on a microprocessor, first time using both proton and neutron beamlines, will be shown in this work.
一些西班牙国家研究项目的发展有助于提高原子能机构为航空航天应用进行辐照试验的能力。将概述过去几年中心的发展情况。在这项工作中,将首次使用质子和中子束线,对当前在微处理器上执行故障注入活动的能力进行特别研究。
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引用次数: 9
Gate Grounded n-MOS Sensibility to Ionizing Dose 栅极接地n-MOS对电离剂量的敏感性
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328673
T. Borel, A. Michez, S. Furic, E. Leduc, J. Boch, A. Touboul, B. Azais, S. Danzeca, L. Dusseau
ESD (electrostatic discharges) is one of the most critical event leading most of the time to the destruction of integrated circuits. Nowadays, most of the integrated circuits are design with inbuilt ESD protections structures that have to be electrically neutral. TID degradation on Gate Grounded nMOSFETs is investigated in this paper. Degradation hypothesis and structure analysis performed on GGnMOS from Microchip have highlighted some possible failure that can lead to an inability to protect properly an integrated circuit, or to an increase of the leakage current of those structure.
静电放电(ESD)是导致集成电路破坏的最关键事件之一。如今,大多数集成电路都设计有内置的ESD保护结构,必须是电中性的。本文研究了栅极接地nmosfet的TID退化。对来自Microchip的GGnMOS进行了退化假设和结构分析,强调了一些可能导致无法正确保护集成电路或导致这些结构泄漏电流增加的故障。
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引用次数: 0
Approximate TMR Based on Successive Approximation to Protect Against Multiple Bit Upset in Microprocessors 基于逐次逼近的微处理器多比特扰流保护算法
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328687
G. Rodrigues, F. Kastensmidt, V. Pouget, A. Bosio
This work proposes the use of Triple Modular Redundancy (TMR) to mitigate multiple bit upsets affecting embedded software. To reduce the TMR's overhead, we propose to exploit approximate computing paradigm and, more in particular, the so-called successive approximations technique. The proposed approach, called Approximate TMR (ATMR), leverages the nature of successive approximation technique to improve fault masking. Successive approximation algorithms are based on loop computations that approximate to a final result on each iteration. By varying the number of iterations, one can observe differences in the fault masking and execution time. Therefore, a trade-off has to be identified between the number of iterations (i.e., the degree of the approximation) in the ATMR and its capability on correcting errors. A set of algorithms were implemented as embedded software in the ARM Cortex A9 processor of Xilinx Zynq-7000 series board. Experiments consist of exposing the finned processor to laser pulses at the data cache memory area provoking bit-flips. Results show that the ATMR approach decreases the execution time overhead compared to the classical TMR while keeping an acceptable fault masking rate.
这项工作提出了使用三模冗余(TMR)来减轻影响嵌入式软件的多比特干扰。为了减少TMR的开销,我们建议利用近似计算范式,特别是所谓的连续近似技术。所提出的方法,称为近似TMR (ATMR),利用逐次逼近技术的性质来改进故障掩蔽。逐次逼近算法基于循环计算,每次迭代近似于最终结果。通过改变迭代次数,可以观察到故障屏蔽和执行时间的差异。因此,必须在ATMR中的迭代次数(即近似的程度)和它的纠错能力之间进行权衡。在Xilinx Zynq-7000系列主板的ARM Cortex A9处理器上实现了一套算法。实验包括将鳍状处理器暴露在数据缓存存储器区域的激光脉冲中引发位翻转。结果表明,与传统的TMR方法相比,该方法在保持可接受的故障掩蔽率的同时减少了执行时间开销。
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引用次数: 2
About physical mechanisms inducing proton Single Event Upset in integrated memory devices 集成存储器件中质子单事件扰动的物理机制研究
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328668
P. Caron, C. Inguimbert, L. Artola, R. Ecoffet, F. Bezerra
The sensitivity of memory devices under proton irradiation has been extensively studied over the years. Two main mechanisms has been identified to drive the SEU sensitivity in last generation of devices: direct ionization for low proton energies and inelastic nuclear reactions for higher proton energies. This paper demonstrates that in some cases, the Coulomb elastic interaction can no longer be neglected and becomes dominant in a certain range of energy. It is also demonstrated that the relative contribution of this mechanism is dependent on the structure environment (overlayers).
近年来,人们对质子辐照下存储器件的灵敏度进行了广泛的研究。在上一代装置中,已经确定了驱动SEU灵敏度的两个主要机制:低质子能量的直接电离和高质子能量的非弹性核反应。本文证明,在某些情况下,库仑弹性相互作用不能再被忽视,并在一定能量范围内占主导地位。还证明了该机制的相对贡献取决于结构环境(覆盖层)。
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引用次数: 0
Parasitic Bipolar Action in SiC Power MOSFETs Demonstrated by Two-Photon Laser Experiment 用双光子激光实验证明了SiC功率mosfet的寄生双极作用
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328733
Robert A. Johnson, A. Witulski, D. Ball, K. Galloway, A. Sternberg, E. Zhang, R. Reed, peixiong zhao, J. Lauenstein, A. Javanainen
A two-photon absorption technique is explored for Silicon carbide power MOSFETs and power junction barrier Schottky diodes using a pulsed laser. The similarities in design between the specific MOSFETs and diodes tested permit using mechanisms existing in the different structures as explanation for observed current variation with laser position. The diode shows variation in average current with change in laser depth only, whereas the MOSFET shows variation both with shifts in depth and shifts in position across the striped geometry of the device. The variation is explained to be due to bipolar amplification of the charge carriers generated in the MOSFET when a pulse focus includes a channel below a gate. This conclusion is then reinforced using results from prior heavy ion and simulation work done for similar Silicon carbide MOSFETs.
利用脉冲激光探索了碳化硅功率mosfet和功率结势垒肖特基二极管的双光子吸收技术。测试的特定mosfet和二极管之间的设计相似性允许使用存在于不同结构中的机制来解释观察到的电流随激光位置的变化。二极管仅随激光深度的变化而显示平均电流的变化,而MOSFET则随器件条纹几何形状的深度和位置的变化而显示变化。这种变化被解释为当脉冲聚焦包括栅极下面的通道时,MOSFET中产生的电荷载流子的双极放大。然后使用先前的重离子和类似碳化硅mosfet的模拟工作的结果加强了这一结论。
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引用次数: 0
Accelerated Test of ELDRS at Ultra-Low Dose Rates for Bipolar Devices 双极器件超低剂量率ELDRS加速试验
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328666
X. Wang, W. Lu, S. Yao, X.L. Li, Q. Guo, C. He, X. Yu, J. Sun
We present accelerated evaluation results of temperature-switching irradiation (TSI) test for ELDRS in bipolar devices at ultra-low dose rates(< 10mrad(Si)/s).
我们提出了在超低剂量率(< 10mrad(Si)/s)下双极器件中ELDRS的温度开关照射(TSI)试验的加速评估结果。
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引用次数: 0
Nonstationary Single Event Latch-up in CMOS ICs CMOS集成电路中的非平稳单事件锁存
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328678
A. Chumakov, D. Bobrovsky, A. Pechenkin, D. V. Savchenkov, G. Sorokoumov
The paper presents experimental results about transient single event latch-up (SEL) in CMOS ICs. The rail span collapse is the main reason of nonstationary SELs. A decrease of the voltage applied to n-p-n-p structure can be caused an additional current both in SEL state and in IC dynamic mode.
本文介绍了CMOS集成电路中瞬态单事件锁存(SEL)的实验结果。轨跨坍塌是引起非平稳sel的主要原因。在SEL状态和IC动态模式下,施加在n-p-n-p结构上的电压的降低会引起额外的电流。
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引用次数: 2
Total-Ionizing-Dose Tolerance of the configuration function of MAX3000A CPLDs MAX3000A cpld配置功能的总电离剂量容限
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328682
Takumi Fujimori, Minoru Watanabe
Recently, space-grade radiation-hardened SRAM-based field programmable gate arrays (FPGAs) have become available. However, since the configuration memory of SRAM-based FPGAs is sensitive to damage by radiation, flash-based FP-GAs and complex programmable logic devices (CPLDs) are frequently used for space systems instead of SRAM-based FPGAs. Although flash-based FPGAs and CPLDs are programmable devices, the configuration memory of them is somewhat robust against radiation. This paper presents experimentally obtained result of the total-ionizing-dose tolerance of the configuration function of a CPLD or MAX3000A (EPM3128ATC100-10; Intel Corp.). The total-ionizing-dose tolerances of the configuration function of six MAX3000A chips have been measured using an approximately 30 TBq 60Co gamma radiation source with emissions up to 50 krad.
最近,基于sram的空间级抗辐射现场可编程门阵列(fpga)已经可用。然而,由于基于sram的fpga的配置存储器对辐射损坏很敏感,基于闪存的FP-GAs和复杂可编程逻辑器件(cpld)经常被用于空间系统,而不是基于sram的fpga。虽然基于闪存的fpga和cpld是可编程器件,但它们的配置存储器对辐射有一定的鲁棒性。本文给出了CPLD或MAX3000A (EPM3128ATC100-10;英特尔公司(Intel corp .))。利用约30 TBq 60Co的γ辐射源,测量了6个MAX3000A芯片构型函数的总电离剂量容限。
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引用次数: 2
Risk Assessment of Electron Induced SEE during the JUICE Mission JUICE任务中电子诱发SEE的风险评估
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328721
N. Sukhaseum, B. Vandevelde, L. Salvy, G. Augustin, A. Varotsou, N. Chatry, M. Tali, F. Bezerra, R. Ecoffet, C. B. Polo
The SEE sensitivity of electronic devices to high energy electrons has been put in evidence experimentally. Several ground experiments have shown that electron induced SEE could occur in recent technologies. In the case of the JUICE mission, the expected electron environment is harsher than for Earth orbits. The impact of such electron fluxes on the embedded electronics was assessed in this work. The study focused on SRAM memories SEU sensitivity. Three different device references were tested under electrons, as well as under protons and heavy ions. The electron and the low energy proton direct ionization contributions to the total SEU rate have been studied in more detail.
实验证明了电子器件对高能电子的SEE灵敏度。几项地面实验表明,电子诱导的SEE可以在最近的技术中实现。在JUICE任务中,预期的电子环境比地球轨道更为恶劣。在这项工作中评估了这种电子通量对嵌入式电子器件的影响。研究的重点是SRAM存储器的SEU敏感性。在电子、质子和重离子下测试了三种不同的设备参考。更详细地研究了电子和低能质子直接电离对总SEU速率的贡献。
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引用次数: 4
System-Level Characterization, Modeling, and Probabilistic Formal Analysis of LEON3 Vulnerability to Transient Faults 系统级表征、建模和瞬态故障脆弱性的概率形式化分析
Pub Date : 2018-09-01 DOI: 10.1109/RADECS45761.2018.9328702
Ghaith Bany Hamad, Marwan Ammar, O. Mohamed, Y. Savaria
This paper presents a continuous-time Markov chain modeling, analysis, and estimation of the LEON3 proces-sor‘s vulnerability to Single Event Upsets (SEUs). At the system-level, the proposed technique provides new insights into SEU propagation probabilities and latency.
本文提出了一种连续时间马尔可夫链模型,分析和估计了单事件扰动(SEUs)对LEON3过程的脆弱性。在系统级,所提出的技术提供了对SEU传播概率和延迟的新见解。
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2018 18th European Conference on Radiation and Its Effects on Components and Systems (RADECS)
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