Mohammed Abdulaziz, Anders Nejdel, Markus Törmänen, H. Sjöland
{"title":"A 3.4mW 65nm CMOS 5th order programmable active-RC channel select filter for LTE receivers","authors":"Mohammed Abdulaziz, Anders Nejdel, Markus Törmänen, H. Sjöland","doi":"10.1109/RFIC.2013.6569565","DOIUrl":null,"url":null,"abstract":"In this work a low power 5th order chebyshev active-RC low pass filter that meets Rel-8 LTE receiver requirements has been designed with programmable bandwidth and overshoot. Designed for a homodyne LTE receiver, filter bandwidths from 700kHz to 10MHz are supported. The bandwidth of the operational amplifiers is improved using a novel phase enhancement technique. The filter was implemented in 65nm CMOS technology with a core area of 0.29mm2. Its total current consumption is 2.83mA from a 1.2V supply. The measured input referred noise is 39nV/√Hz, the in-band IIP3 is 21.5dBm, at the band-edge the IIP3 is 20.7dBm, the out-of-band IIP3 is 20.6dBm, and the compression point is 0dBm.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2013.6569565","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
In this work a low power 5th order chebyshev active-RC low pass filter that meets Rel-8 LTE receiver requirements has been designed with programmable bandwidth and overshoot. Designed for a homodyne LTE receiver, filter bandwidths from 700kHz to 10MHz are supported. The bandwidth of the operational amplifiers is improved using a novel phase enhancement technique. The filter was implemented in 65nm CMOS technology with a core area of 0.29mm2. Its total current consumption is 2.83mA from a 1.2V supply. The measured input referred noise is 39nV/√Hz, the in-band IIP3 is 21.5dBm, at the band-edge the IIP3 is 20.7dBm, the out-of-band IIP3 is 20.6dBm, and the compression point is 0dBm.