Poly-Si Unetch Failure Due to Etching Rate Dependence of Si Orientation

D. Nam, Hyunjun Ryu, Shin-Young Chung, Brandon Lee, Sukchan Song, Eunbee Go, Bongsu Chae, A. Kim, Bomi Kim, Hae-Suk Kim, Ji-Sun Yang, SoYeon Han
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Abstract

The origin of poly-Si unetch failure in FinField-effect transistor (FinFET) was defined as an etch rate dependence of a specific Si grain in Si poly crystalline. We analyzed a failure in a FinFET based static random access memory (SRAM). Abnormal point in a passive voltage contrast result was measured by nano-probing and fast Vth shift was detected at a pull down node in SRAM. Transmission electron microscopy (TEM) was applied to find out the cause of the failure, finding that poly-Si in dummy gate was not successfully etched. High-resolution TEM and fast Fourier transformation analysis showed that there was a (111) Si grain. The etch rate of (111) Si is 1–2% of (110) Si, which leads poly-Si unetch failure in gate in a FinFET structure.
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硅取向对蚀刻速率的依赖导致多晶硅非蚀刻失效
FinFET(场效应晶体管)中多晶硅非蚀刻失效的根源被定义为硅多晶中特定硅颗粒的蚀刻速率依赖。我们分析了基于FinFET的静态随机存取存储器(SRAM)的故障。采用纳米探针测量无源电压对比结果中的异常点,并在SRAM的下拉节点处检测到快速的Vth偏移。利用透射电子显微镜(TEM)分析了失效的原因,发现假栅中的多晶硅没有成功蚀刻。高分辨率透射电镜和快速傅里叶变换分析表明,材料中存在(111)Si晶粒。(111) Si的蚀刻速率是(110)Si的1-2%,这导致在FinFET结构的栅极中多晶硅不能蚀刻。
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