{"title":"A high-gain low-power low-noise-figure differential CMOS LNA with 33% current-reused negative-conductance accommodation structure","authors":"To-Po Wang, Shih-Hua Chiang","doi":"10.1109/SOCC.2015.7406917","DOIUrl":null,"url":null,"abstract":"An integrated differential CMOS low-noise amplifier (LNA) with high gain, low dc power consumption, and low noise figure is presented in this paper. By introducing a current-reused negative-conductance accommodation structure to a differential LNA, the transconductance of the LNA can be effectively increased, leading to a performance enhanced differential LNA. To characterize the performance improvement of the differential LNA, two differential LNAs with and without the 33.3% current-reused negative-conductance accommodation structure were designed and fabricated for comparison. At supply voltages of 0.65-V VDD1 and 1.2-V VDD2, the measured gain of the differential LNA can be significantly improved from 13.1 dB to 15.8 dB, leading to a remarkable 2.7-dB gain increment. The measured dc power dissipation of the presented differential LNA with negative-conductance accommodation structure is 11.48 mW. In addition, the measured noise figure of the differential LNA with a current-reused negative-conductance accommodation structure is 3.3 dB. Compared to previously published 0.18-μm CMOS LNAs at the same frequency of interest, the proposed differential LNA with the current-reused negative-conductance accommodation structure achieves the high gain, low dc power dissipation, and low noise figure.","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"143 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406917","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
An integrated differential CMOS low-noise amplifier (LNA) with high gain, low dc power consumption, and low noise figure is presented in this paper. By introducing a current-reused negative-conductance accommodation structure to a differential LNA, the transconductance of the LNA can be effectively increased, leading to a performance enhanced differential LNA. To characterize the performance improvement of the differential LNA, two differential LNAs with and without the 33.3% current-reused negative-conductance accommodation structure were designed and fabricated for comparison. At supply voltages of 0.65-V VDD1 and 1.2-V VDD2, the measured gain of the differential LNA can be significantly improved from 13.1 dB to 15.8 dB, leading to a remarkable 2.7-dB gain increment. The measured dc power dissipation of the presented differential LNA with negative-conductance accommodation structure is 11.48 mW. In addition, the measured noise figure of the differential LNA with a current-reused negative-conductance accommodation structure is 3.3 dB. Compared to previously published 0.18-μm CMOS LNAs at the same frequency of interest, the proposed differential LNA with the current-reused negative-conductance accommodation structure achieves the high gain, low dc power dissipation, and low noise figure.