Specification test minimization for given defect level

S. Sindia, V. Agrawal
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引用次数: 2

Abstract

An accepted industry practice for testing of analog and RF circuits is to use specification-based tests. These tests are capable of providing a very low defect level but tend to be long and costly. In this work, we focus on minimizing the specification-based tests without exceeding any given defect level. We use Monte Carlo simulation to determine the probabilities with which a test covers specifications it was not originally intended to cover. These probabilities and the given defect level then define an integer linear programming (ILP) model for eliminating unnecessary tests. This paper gives sufficient evidence of successful implementation of the proposed methodology. A hypothetical example of ten specifications illustrates that depending upon the defect level requirement up to half of the tests may be eliminated. Monte Carlo simulation using spice for probabilistic characterization of tests versus specifications of a commercially available operational amplifier circuit is presented as evidence for the applicability of the technique.
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针对给定的缺陷级别,规范测试最小化
模拟和射频电路测试的公认行业惯例是使用基于规范的测试。这些测试能够提供非常低的缺陷水平,但往往是漫长和昂贵的。在这项工作中,我们专注于最小化基于规范的测试,而不超过任何给定的缺陷级别。我们使用蒙特卡罗模拟来确定测试覆盖规格的概率,它最初并不打算覆盖规格。这些概率和给定的缺陷级别然后定义了一个整数线性规划(ILP)模型,用于消除不必要的测试。本文给出了成功实施所提出的方法的充分证据。假设有十个规格说明的例子说明,根据缺陷级别需求,可以消除多达一半的测试。蒙特卡罗模拟使用香料的概率表征测试相对于商用运算放大器电路的规格,提出了该技术的适用性的证据。
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