Dnyan Khatri, S. Lim, M. Ho, V. Narang, Dakshina-Murthy Srikanteswara, K. Kasprak
{"title":"Resolving systematic voltage sensitive soft failures in 28nm microprocessor devices","authors":"Dnyan Khatri, S. Lim, M. Ho, V. Narang, Dakshina-Murthy Srikanteswara, K. Kasprak","doi":"10.1109/IPFA.2014.6898173","DOIUrl":null,"url":null,"abstract":"With rapid developments in semiconductor manufacturing technologies, new and more complicated challenges emerge in the Failure Analysis space. It has been a challenge to perform failure analysis for voltage-sensitive soft failures, especially those occurring in SRAM circuitries. However, fault localization in sub-micron devices is successful if existing FA techniques are innovatively and extensively leveraged during physical fault isolation. This paper emphasizes the use of SEM-based nano-probing followed by advanced TEM techniques to successfully identify the root cause of failure, thus enabling the wafer fab to take appropriate corrective measures to mitigate such failures. A successful case study involving these techniques will also be discussed.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2014.6898173","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
With rapid developments in semiconductor manufacturing technologies, new and more complicated challenges emerge in the Failure Analysis space. It has been a challenge to perform failure analysis for voltage-sensitive soft failures, especially those occurring in SRAM circuitries. However, fault localization in sub-micron devices is successful if existing FA techniques are innovatively and extensively leveraged during physical fault isolation. This paper emphasizes the use of SEM-based nano-probing followed by advanced TEM techniques to successfully identify the root cause of failure, thus enabling the wafer fab to take appropriate corrective measures to mitigate such failures. A successful case study involving these techniques will also be discussed.