{"title":"Exploiting multi-band transmission line interconnects to improve the efficiency of cache coherence in multiprocessor system-on-chip","authors":"Qi Hu, Kejun Wu, Peng Liu","doi":"10.1109/SOCC.2015.7406990","DOIUrl":null,"url":null,"abstract":"Main-stream general-purpose microprocessors integrate a growing number of cores on-chip, requiring high-performance interconnects and efficient cache coherence for data transmission and sharing. Conventional directory-based cache coherence has high indirection overhead, which adds to the critical path of data requests and lowers overall system performance. In fact, with globally shared high-performance interconnects, cache coherence could be optimized and the indirection overhead could be relieved. This paper explores the use of multi-band transmission lines to implement globally shared interconnects. Taking advantage of the aggregate frequency band resources, the proposed interconnect supports efficient multi-cast, and helps improve the efficiency of cache coherence with augmented parallelism. Coherence indirections are avoided, and we have seen an average of 17% boost in application performance, as well as an average of 18% throughput improvement compared to an implementation of conventional cache coherence on single-band transmission line based interconnects.","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406990","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Main-stream general-purpose microprocessors integrate a growing number of cores on-chip, requiring high-performance interconnects and efficient cache coherence for data transmission and sharing. Conventional directory-based cache coherence has high indirection overhead, which adds to the critical path of data requests and lowers overall system performance. In fact, with globally shared high-performance interconnects, cache coherence could be optimized and the indirection overhead could be relieved. This paper explores the use of multi-band transmission lines to implement globally shared interconnects. Taking advantage of the aggregate frequency band resources, the proposed interconnect supports efficient multi-cast, and helps improve the efficiency of cache coherence with augmented parallelism. Coherence indirections are avoided, and we have seen an average of 17% boost in application performance, as well as an average of 18% throughput improvement compared to an implementation of conventional cache coherence on single-band transmission line based interconnects.