{"title":"Optimizing real-time fault tolerance design in WSI","authors":"J. Samson","doi":"10.1109/ICWSI.1993.255263","DOIUrl":null,"url":null,"abstract":"An overview of real-time fault tolerance performance issues is provided, and a systematic approach to the optimization of real-time fault tolerance design in VLSI and wafer scale architectures is described and illustrated. The approach is based on the identification of fundamental optimization metrics, represented by simple product and quotient (reciprocal product) relationships, which extend traditional cost/benefit analysis to real-time fault tolerance in VLSI and wafer scale architectures and systems.<<ETX>>","PeriodicalId":377227,"journal":{"name":"1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICWSI.1993.255263","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
An overview of real-time fault tolerance performance issues is provided, and a systematic approach to the optimization of real-time fault tolerance design in VLSI and wafer scale architectures is described and illustrated. The approach is based on the identification of fundamental optimization metrics, represented by simple product and quotient (reciprocal product) relationships, which extend traditional cost/benefit analysis to real-time fault tolerance in VLSI and wafer scale architectures and systems.<>
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