S. Hara, I. Watanabe, N. Sekine, A. Kasamatsu, K. Katayama, K. Yoshida, S. Amakawa, M. Fujishima
{"title":"Compact 138-GHz amplifier with 18-dB peak gain and 27-GHz 3-dB bandwidth","authors":"S. Hara, I. Watanabe, N. Sekine, A. Kasamatsu, K. Katayama, K. Yoshida, S. Amakawa, M. Fujishima","doi":"10.1109/RFIT.2015.7377885","DOIUrl":null,"url":null,"abstract":"This paper presents a wideband differential amplifier operating at 138 GHz in 40-nm CMOS. It is composed of five differential common source stages with cross-coupled capacitors. A small-signal gain of 18 dB at 138 GHz and a 3-dB bandwidth of 27 GHz are achieved. It consumes 75 mW from a 0.94-V voltage supply. The die area with balun and pads is 945 × 842 μm2 and the core size not including input/output matching networks is 201 × 284 μm2. The small core area is realized by using a refined \"fishbone\" layout technique.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2015.7377885","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper presents a wideband differential amplifier operating at 138 GHz in 40-nm CMOS. It is composed of five differential common source stages with cross-coupled capacitors. A small-signal gain of 18 dB at 138 GHz and a 3-dB bandwidth of 27 GHz are achieved. It consumes 75 mW from a 0.94-V voltage supply. The die area with balun and pads is 945 × 842 μm2 and the core size not including input/output matching networks is 201 × 284 μm2. The small core area is realized by using a refined "fishbone" layout technique.