L. Clark, Clifford Youngsciortino, Maximilian Siath, Leonardo Martinez, W. Brown, Shayena Khandker, Azad Derbedrosian, Sungho Kim, Ryan Melendez, S. Guertin, J. Yang-Scharlotta
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引用次数: 1
Abstract
Total ionizing dose (TID) has a significant effect on fully depleted silicon on insulator (FDSOI) transistors, which can be characterized the front gate threshold voltage (Vth) shift. We present transistor array test structure to characterize transistor TID. The resulting structure is one device under test (DUT) on a larger test integrated circuit (IC). The transistor array allows TID testing of a largenumber of devices in a packaged die that is amenable to gamma irradiation and other reliability studies, fabricated on a 22 nm FDSOI process. The approach is however, applicable to any fabrication process.
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