A K-band low noise amplifier with on-chip baluns in 90nm CMOS

Abstract

This paper presents a CMOS K-band low noise amplifier (LNA). Pseudo differential structure with on-chip balun has more advantages than single-end in system-on-chip (SOC) and so forth. In this design, two on-chip baluns are inserted in the LNA for single-in and single-out. Some inter-digital capacitors and a transformer are employed for matching to reduce the number of the inductors. The proposed LNA is fabricated in 90 nm CMOS process, achieved a gain of 20dB at 23.5 GHz, a 3-dB bandwidth of 2 GHz (from 22.7 to 24.7 GHz), and a noise figure of 3.6 dB with an input return loss of 17 dB, while consuming 16.5 mW with 1V power supply.