Reliability Screening of a Hybrid DBC/PCB power semiconductor prepackage

Abstract

PCB embedding in combination with direct-bonded copper (DBC) substrates is an attractive approach for packaging of power semiconductors facilitating low-inductive designs while relying on a proven insulating material. However, the CTE mismatch of these materials could cause reliability issues. This study presents an initial reliability screening using simple IGBT prepackages with alumina-based DBC as test vehicles. After -40/150 °C temperature cycles, fracture of the substrate and the chip is observed, resulting in an increased on-state resistance. Literature data suggest that the substrate failure is independent from the embedding. To gain a deeper understanding of the limitations of the technology, further research with optimized DBC substrates is required.